The present invention relates to a semiconductor device and a timing control method for the same, and in particular to a semiconductor device including an internal circuit connected to a power supply via a source transistor as well as to a timing control method for such a semiconductor device.
The recent development of semiconductor memories has decreased the operating voltage while having increased the operating frequency. In LPDDR2-SDRAMs (Low Power Double Data Rate2 Synchronous Dynamic Random Access Memories) (hereafter, referred to simply as LPDDR2), for example, the power supply voltage of a peripheral circuit is 1.2V and the operating frequency is 667 MHz.
In order to realize rapid operation, the Vt (threshold voltage) of transistors used in peripheral circuits has been lowered and, as a result, increase in off-current has become impossible to disregard. In order to solve this, a source transistor is provided between an internal circuit and a power supply so that the internal circuit is activated only when necessary. This type of technique is described for example in Japanese Laid-Open Patent Publication No. 2000-195254.
Further, a technique is also employed to activate an internal circuit in response to command signals so that the internal circuit is activated only when necessary. This type of technique is described for example in Japanese Laid-Open Patent Publication No. 2002-74953.